Although the underlined problem of the present invention will be described with a relation to DRAM memory devices the present invention is not limited thereon, but relates to any semiconductor memory device.
DRAM memory devices are currently used in a plurality of battery powered applications. A desired operating time of these applications sets limits on a power consumption of the memory devices. A significant reduction of the power consumption is achieved by lowering the operating voltage of the memory devices.
Memory devices with a lowered operating voltage are desired to have the same operating speed and access time to the information stored in the memory device as power consuming devices. But the switching speed of the transistors in the memory devices increases along with a lowered operating voltage. This can be compensated for by decreasing a threshold voltage of these transistors in parallel such that their switching speed is maintained.
In a DRAM an information unit is stored as a charge in an isolated capacitor provided within a memory cell. The charge can be accessed via a transistor. In order to prevent loss of the information this transistor must have good isolation properties under all operating conditions. Therefore, a difference of the threshold voltage of the transistor to the lower operating voltage must be sufficiently large such that unintentional voltage fluctuations in a control line of this transistor will not switch unintentionally the transistor in a conductive state. Thus a lower limit on the threshold voltage is given due to restrictions on the reliability of the memory device.
Thus a trade-off of low power consumption is given which demands for a low operating voltage and a high-speed operation demanding for a large relation of the operating voltage with respect to the threshold voltage under the constraint of a minimal threshold voltage.
The memory device must operate properly for all temperatures in its operating temperature range. The threshold voltage of a transistor decreases along with rising temperature and is at its lowest level at the highest operating temperature. The transistors are designed such that this lowest level is above or equal the afore mentioned minimal threshold voltage for ensuring a reliable operation.
At low temperatures, however, the threshold voltage of the transistor is large rendering the operating speed low due to its dependence on the threshold voltage. Thus a semiconductor memory device using such transistors will have long access times to memory cells and a low data throughput at low temperatures.